Even though the basic CDCL scheme is already quite effective, a SAT solver requires careful implementation of many additional techniques to achieve state-of-the-art performance. Probably most important are decision heuristics and their implementation, followed by data-structures for fast propagation, garbage collection schemes for reclaiming inactive learned clauses, then preprocessing techniques, and finally restart scheduling. Our recent results revisiting decision heuristics as well as restart schemes on one hand simplified our understanding of what is essential for fast SAT solvers, but on the other hand revealed weaknesses both in SAT solving technology and how it is evaluated empirically.

BIO

Since 2004 Prof. Armin Biere is a Full Professor for Computer Science at the Johannes Kepler University in Linz, Austria, and chairs the Institute for Formal Models and Verification.

Between 2000 and 2004 he held a position as Assistant Professor within the Department of Computer Science at ETH Zürich, Switzerland. In 1999 Biere was working for a start-up company in electronic design automation after one year as Post-Doc with Edmund Clarke at CMU, Pittsburgh, USA. In 1997 Biere received a Ph.D. in Computer Science from the University of Karlsruhe, Germany.

His primary research interests are applied formal methods, more specifically formal verification of hardware and software, using model checking, propositional and related techniques. He is the author and co-author of more than 120 papers and served on the program committee of more than 110 international conferences and workshops. His most influential work is his contribution to Bounded Model Checking. Decision procedures for SAT, QBF and SMT, developed by him or under his guidance rank at the top many international competitions and were awarded 57 medals including 32 gold medals.

Besides organizing several workshops Armin Biere was co-chair of SAT'06, and FMCAD'09, was PC co-chair of HVC'12, and co-chair of CAV'14. He serves on the editorial boards of the Journal on Satisfiability, Boolean Modeling and Computation (JSAT), the Journal of Automated Reasoning (JAR), and the journal for Formal Methods in System Design (FMSD).

He is an editor of the Handbook of Satisfiability and initiated and organizes the Hardware Model Checking Competition (HWMCC). Since 2011 he serves as chair of the SAT Association and since 2012 on the steering committee of FMCAD. In 2006 Armin Biere co-founded NextOp Software Inc. which was acquired by Atrenta Inc. in 2012.